---
title: "TileLang Beats Triton by 5x Writing GPU Kernels in 80 Lines"
subtitle: "TileLang is a Python DSL that lets you write GPU kernels with Triton-like ease but CUTLASS-level control — and DeepSeek just used it in production."
url: "https://alphasignal.ai/news/tilelang-beats-triton-by-5x-writing-gpu-kernels-in-80-lines"
author: "AlphaSignal Newsroom"
author_url: "https://alphasignal.ai/editorial-team"
company: "AlphaSignal"
company_url: "https://alphasignal.ai/company/alphasignal"
published: "2026-07-24T10:03:34.000Z"
updated: "2026-07-24T19:08:32.746Z"
type: "Repo"
topics:
  - "Gpus"
  - "Open Source"
subtopics:
  - "Kernels"
  - "Quantization"
upvotes: 4068
source_url: "https://github.com/tile-ai/tilelang"
comments: 0
truncated: true
---

# TileLang Beats Triton by 5x Writing GPU Kernels in 80 Lines

> TileLang is a Python DSL that lets you write GPU kernels with Triton-like ease but CUTLASS-level control — and DeepSeek just used it in production.

[TileLang](https://github.com/tile-ai/tilelang) has quietly become one of the most interesting tools in the GPU kernel programming space. Triton is fast to write but surrenders too much control to the compiler. CUTLASS gives you full control at the cost of hundreds of lines of C++ template machinery. TileLang offers a third path: write Python, explicitly decide what lives in shared memory and how the pipeline is staged, and let a layout inference pass handle the rest.

## The problem it solves

Modern AI workloads depend on optimized kernels for training and inference. These kernels follow clear data-flow patterns: move tiles between DRAM and SRAM, compute on those tiles, repeat. The patterns are simple; the implementation is not. Achieving peak performance requires hardware-centric decisions that most compilers either hide from you or force you to express in verbose, brittle code.

The original author of TileLang described writing 500 lines of scheduling primitives per operator during his Microsoft Research internship, code that only he could understand. Fused kernels are increasingly necessary for performance, but Triton lacks the fine-grained control to implement them well, and hand-writing CUDA or CUTLASS produces code that is hard to read and harder to maintain.

## How it works

TileLang is a domain-specific language built on TVM. It targets GPU and CPU kernels, including GEMM, dequantized GEMM, FlashAttention, and linear attention variants. The programming model rests on three ideas:

* **Tiles are first-class objects.** A shaped chunk of data, say `block_M × block_K`, is owned by a thread block, warp, or thread. You reason at the tile level, not the individual thread level.
* **You place buffers in the memory hierarchy yourself.** `T.alloc_shared` puts data in shared memory; `T.alloc_fragment` puts it in registers. Triton hides shared-memory allocation inside the compiler. TileLang does not.
* **The compiler infers the thread mapping.** Once you declare where a tile lives and what operation runs on it, a layout inference pass parallelizes it across threads and works out the register and shared-memory layouts automatically, with the option to override.

_Preview only. Full text requires an AlphaSignal Pro account._

## Sources

- [tile-ai/tilelang GitHub Repository](https://github.com/tile-ai/tilelang)
- [TileLang: A Composable Tiled Programming Model for AI Systems (arXiv)](https://arxiv.org/pdf/2504.17577)
- [TileLang: Bridge Programmability and Performance in Modern Neural Kernels (OpenReview)](https://openreview.net/forum?id=Jb1WkNSfUB)
- [Writing High-Performance Kernels in TileLang, from GEMM to MLA (HuggingFace)](https://huggingface.co/blog/AtlasCloud-AI/writing-high-performance-kernels-in-tilelang)
- [DeepSeek-V4 Technical Report (arXiv)](https://arxiv.org/pdf/2606.19348)